An FPGA-Implemented Parallel System of Face Recognition, for Digital Forensics Applications
Author:
Affiliation:
1. University of Patras,SCYTALE Group,Computer Engineering and Informatics Department,Hellas
Funder
European Cooperation in Science and Technology
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9352056/9352151/09352182.pdf?arnumber=9352182
Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Network on Privacy-Aware Audio-and Video-Based Applications for Active and Assisted Living: GoodBrother Project;2022 25th Euromicro Conference on Digital System Design (DSD);2022-08
2. Modeling and implementing the behavior of RR robot using FPGA;Signal Processing, Sensor/Information Fusion, and Target Recognition XXXI;2022-06-08
3. iFace: A Deepfake Resilient Digital Identification Framework for Smart Cities;2021 IEEE International Symposium on Smart Electronic Systems (iSES);2021-12
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