Power Design Validation of Two-Stage Power System

Author:

Li Y.L.1,Lee Falconee1,Liang Kevin1,Tzeng Kate1,Tien Ming1,Wu Donghan1,Tsai Bryant1,Chang Patt1,Tseng Jim1,Qin Shijuan2

Affiliation:

1. Intel Corporation,Taipei,Taiwan

2. Intel Corporation,Beijing,PRC

Publisher

IEEE

Reference6 articles.

1. Design and performance evaluation of microprocessor packaging capacitors using integrated capacitor-via-plane model;li;IEEE Transactions on Advanced Packaging,2000

2. Enhancing power distribution system through 3D integrated models, optimized designs, and switching VRM model

3. FIVR --- Fully integrated voltage regulators on 4th generation Intel® Core™ SoCs;burton;IEEE Applied Power Electronics Conference and Exposition,2014

4. CPU Power Delivery Impedance Profile Resonances Impact on Core FMAX

5. Power distribution system design methodology and capacitor selection for modern CMOS technology

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