Single phase symmetrical and asymmetrical design of multilevel inverter topology with reduced number of switches-Reference-Cited by-同舟云学术

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Single phase symmetrical and asymmetrical design of multilevel inverter topology with reduced number of switches

Published:2018-03 Issue: Volume: Page:
ISSN:
Container-title:2018 IEEMA Engineer Infinite Conference (eTechNxT)
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Author:

Siddique Marif Daula,Mustafa Asif,Sarwar Adil,Mekhilef Saad,Shah Noraisyah Binti Mohamed,Seyedamahmousian Mehdi,Stojcevski Alex,Horan Ben,Ogura Koki

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8375126/8385279/08385334.pdf?arnumber=8385334

Cited by 12 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Design of Planar Antennas in Ku- and S/C-Bands Using the Fibonacci Slot;IETE Journal of Research;2023-12-17

2. An Asymmetrical Active-Neutral-Point-Clamped Five-Level H-bridge Inverter for Open-Winding Motor Applications With Its Modulation Strategy;IEEE Transactions on Power Electronics;2023-10

3. Real time implementation of a new seven level multilevel inverter with design considerations for feasible and reliable operation;International Journal of Circuit Theory and Applications;2023-05-23

4. Analysis of Symmetrical and Asymmetrical Multilevel Inverter using GWO Algorithm;2021 2nd Information Technology To Enhance e-learning and Other Application (IT-ELA);2021-12-28

5. Harmonic Analysis of Three-Phase Asymmetrical Multilevel Inverter with Reduced Number of Switches;2021 4th International Iraqi Conference on Engineering Technology and Their Applications (IICETA);2021-09-21

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