Asymmetric and Double-Layered Gate-All- Around Structures of 1T-DRAM for Sensing Margin and Retention Improvement
Author:
Affiliation:
1. Department of Electrical and Electronic Engineering, Yonsei University, Seoul, South Korea
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Link
http://xplorestaging.ieee.org/ielx7/16/10538150/10496557.pdf?arnumber=10496557
Reference25 articles.
1. 1T-1C Dynamic Random Access Memory Status, Challenges, and Prospects
2. Future of dynamic random-access memory as main memory
3. Technology for sub-50 nm DRAM and NAND flash manufacturing;Kim
4. High-performance (EOT<0.4 nm, Jg 10−7 A/cm2) ALD-deposited Ru/SrTiO3 stack for next generations DRAM pillar capacitor;Popovici
5. A Capacitorless 1T-DRAM on SOI Based on Dynamic Coupling and Double-Gate Operation
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