Optimizing a-IGZO Source-Gated Transistor Current by Structure Alteration via TCAD Simulation and Experiment-Reference-Cited by-同舟云学术

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Optimizing a-IGZO Source-Gated Transistor Current by Structure Alteration via TCAD Simulation and Experiment

Published:2024-04 Issue:4 Volume:71 Page:2431-2437
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Sihapitak Pongsakorn¹^ORCID,Bermundo Juan Paolo¹^ORCID,Bestelink Eva²^ORCID,Sporea Radu A.²^ORCID,Uraoka Yukiharu¹^ORCID

Affiliation:

1. Division of Materials Science, Nara Institute of Science and Technology, Nara, Japan

2. Advanced Technology Institute, School of Computer Science and Electronic Engineering, Faculty of Engineering and Physical Sciences, University of Surrey, Guildford, U.K

Funder

Japan Society for the Promotion of Science (JSPS) Grants-in-Aid for Scientific Research Program

Engineering and Physical Sciences Research Council

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Link

http://xplorestaging.ieee.org/ielx7/16/10482422/10443419.pdf?arnumber=10443419

Reference43 articles.

1. High Performance Amorphous In–Ga–Zn–O Thin-Film Transistors with Low Temperature High-k Solution Processed Hybrid Gate Insulator

2. Present status of amorphous In–Ga–Zn–O thin-film transistors

3. Recent advances in flexible solution-processed thin-film transistors for wearable electronics;Ma;Mater. Sci. Semicond. Process.,2023

4. A Review of Low‐Temperature Solution‐Processed Metal Oxide Thin‐Film Transistors for Flexible Electronics

5. Enabling thin-film transistor technologies and the device metrics that matter

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