CMOS Logic and Capacitorless DRAM by Stacked Oxide Semiconductor and Poly-Si Transistors for Monolithic 3-D Integration-Reference-Cited by-同舟云学术

CMOS Logic and Capacitorless DRAM by Stacked Oxide Semiconductor and Poly-Si Transistors for Monolithic 3-D Integration

Published:2024-08 Issue:8 Volume:71 Page:4664-4669
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Wang Ziheng¹,Zheng Liankai¹^ORCID,Lin Zhiyu¹,Zhao Jinxiu¹^ORCID,Tang Wei¹^ORCID,Feng Linrun²,Liu Zhe²,Li Xuefei³^ORCID,Guo Xiaojun¹^ORCID,Si Mengwei¹^ORCID

Affiliation:

1. Department of Electronic Engineering, Shanghai Jiao Tong University, Shanghai, China

2. Hangzhou LinkZill Technology Company Ltd., Hangzhou, Zhejiang, China

3. Wuhan National High Magnetic Field Center, School of Electrical and Electronic Engineering, Huazhong University of Science and Technology, Wuhan, Hubei, China

Funder

STI 2030-Major Projects

National Natural Science Foundation of China

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Link

http://xplorestaging.ieee.org/ielx8/16/10609410/10584309.pdf?arnumber=10584309

Reference40 articles.

1. Evaluation of Off-State Current Characteristics of Transistor Using Oxide Semiconductor Material, Indium–Gallium–Zinc Oxide

2. Electrical characteristics and short-channel effect ofc-axis aligned crystal indium gallium zinc oxide transistor with short channel length

3. Back-End-of-Line Compatible Transistors for Monolithic 3-D Integration

4. Nanometre-thin indium tin oxide for advanced high-performance electronics

5. 3D-stacked CAAC-In-Ga-Zn oxide FETs with gate length of 72 nm;Oota

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