Author:
Guo Guannan,Huang Tsung-Wei,Lin Yibo,Wong Martin
Cited by
14 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Accelerating Static Timing Analysis Using CPU–GPU Heterogeneous Parallelism;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-12
2. A GPU-Accelerated Framework for Path-Based Timing Analysis;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-11
3. Invited Paper: Accelerating Routability and Timing Optimization with Open-Source AI4EDA Dataset CircuitNet and Heterogeneous Platforms;2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD);2023-10-28
4. uSAP: An Ultra-Fast Stochastic Graph Partitioner;2023 IEEE High Performance Extreme Computing Conference (HPEC);2023-09-25
5. GLARE: Accelerating Sparse DNN Inference Kernels with Global Memory Access Reduction;2023 IEEE High Performance Extreme Computing Conference (HPEC);2023-09-25