ESD-capability Improvement of Ultra-high Voltage nLDMOS Components by the Drain Side Engineering
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9661583/9661588/09661612.pdf?arnumber=9661612
Reference14 articles.
1. A Modified CLTdSCR With Low Leakage and Low Capacitance for ESD Protection
2. System-Level IEC ESD Failures in High-Voltage DeNMOS-SCR: Physical Insights and Design Guidelines
3. A Gated-Diode ESD SCR-Incorporated BJT for Reversed Floating P⁺ Junction Modulation
4. A High Failure-Current Gate-Controlled Dual-Direction SCR for High-Voltage ESD Protection in 0.18-μm BCD Technology
5. Verification of an Equivalent Circuit Model for LDMOS-SCR Based on 0.5 µm CMOS Process
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