HashPIM: High-Throughput SHA-3 via Memristive Digital Processing-in-Memory
Author:
Affiliation:
1. Israel Institute of Technology,Andrew and Erna Viterbi Faculty of Electrical and Computer Engineering, Technion,Israel
Funder
European Research Council
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9837335/9837476/09837685.pdf?arnumber=9837685
Reference27 articles.
1. A Processing-In-Memory Implementation of SHA-3 Using a Voltage-Gated Spin Hall-Effect Driven MTJ-based Crossbar
2. Logic Design Within Memristive Memories Using Memristor-Aided loGIC (MAGIC)
3. RACER: Bit-pipelined processing using resistive memory;truong;Micro,2021
4. DRISA: A DRAM-based reconfigurable in-situ accelerator;shuangchen;Micro,2017
5. Compute Caches
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1. Design and Implementation of AES-SHA Security Hardware using FPGA;2023 First International Conference on Advances in Electrical, Electronics and Computational Intelligence (ICAEECI);2023-10-19
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