Weighted two-valued digit-set encodings: unifying efficient hardware representation schemes for redundant number systems

Author:

Jaberipur G.,Parhami B.,Ghodsi M.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 28 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Efficient Hardware Accelerators for k-Nearest Neighbors Classification using Most Significant Digit First Arithmetic;2023-11-29

2. kNN-MSDF: A Hardware Accelerator for k-Nearest Neighbors Using Most Significant Digit First Computation;2022 IEEE 35th International System-on-Chip Conference (SOCC);2022-09-05

3. Teaching redundant residue number system for electronics and computer students;International Journal of Mathematical Education in Science and Technology;2022-08-10

4. An Efficient FPGA Implementation of k-Nearest Neighbors via Online Arithmetic;2022 IEEE 30th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM);2022-05-15

5. Impact of Radix-10 Redundant Digit Set [−6, 9] on Basic Decimal Arithmetic Operations;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2022-01

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