Design and Implementation of Cost-Effective Probabilistic-Based Noise-Tolerant VLSI Circuits-Reference-Cited by-同舟云学术

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Design and Implementation of Cost-Effective Probabilistic-Based Noise-Tolerant VLSI Circuits

Published:2009-11 Issue:11 Volume:56 Page:2411-2424
ISSN:1549-8328
Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
language:
Short-container-title:IEEE Trans. Circuits Syst. I

Author:

I-Chyn Wey ,You-Gang Chen ,Chang-Hong Yu ,An-Yeu Wu ,Jie Chen

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/8919/5308577/04785218.pdf?arnumber=4785218

Cited by 16 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Improved Low-Power Cost-Effective DCT Implementation Based on Markov Random Field and Stochastic Logic;IEEE Transactions on Circuits and Systems for Video Technology;2020-10

2. An efficient and reliable MRF-based methodology for designing low-power VLSI circuits;Integration;2020-07

3. Low-Power Noise-Immune Nanoscale Circuit Design Using Coding-Based Partial MRF Method;IEEE Journal of Solid-State Circuits;2018-08

4. Feedback-Based Low-Power Soft-Error-Tolerant Design for Dual-Modular Redundancy;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2018-08

5. Low Power Area-Efficient DCT Implementation Based on Markov Random Field-Stochastic Logic;2018 IEEE International Symposium on Circuits and Systems (ISCAS);2018-05

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