An Efficient Delay Model for MOS Current-Mode Logic Automated Design and Optimization-Reference-Cited by-同舟云学术

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An Efficient Delay Model for MOS Current-Mode Logic Automated Design and Optimization

Published:2010-08 Issue:8 Volume:57 Page:2041-2052
ISSN:1549-8328
Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
language:
Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Musa Osman,Shams Maitham

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/8919/5545511/05418881.pdf?arnumber=5418881

Cited by 27 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Enhanced Low-Power Digital Signal Processing via a Novel Reversible MCML-Based Carry Select Adder;Traitement du Signal;2024-04-30

2. Design and Analysis of an Ultralow-Voltage Complementary Fold-Interleaved Multiple-Tail Current Mode Logic;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-11

3. Active loaded source-coupled logic: Applications and performance comparison;AEU - International Journal of Electronics and Communications;2023-09

4. Simple and Accurate Model for the Propagation Delay in MCML Gates;Electronics;2023-06-15

5. A Novel Adaptive Current Control Technique Based Modified MOS Current Mode Logic Circuits for Low Power and Area Efficient;Wireless Personal Communications;2021-07-24

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