Author:
Vydyanathan N.,Krishnamoorthy S.,Sabin G.M.,Catalyurek U.V.,Kurc T.,Sadayappan P.,Saltz J.H.
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Computational Theory and Mathematics,Hardware and Architecture,Signal Processing
Cited by
22 articles.
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4. Static Mapping of Parallelizable Tasks under Deadline Constraints;IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences;2017
5. Hybrid Heuristics for Mapping Task Problem on Large Scale Heterogeneous Platforms;2016 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW);2016-05