Automated Synthesis of Asynchronous Tsetlin Machines on FPGA

Author:

Mao Gang1,Yakovlev Alex1,Xia Fei1,Lan Tian1,Yu Shengqi1,Shafik Rishad1

Affiliation:

1. Microsystems Research Group, Newcastle University,Newcastle upon Tyne,UK

Publisher

IEEE

Reference19 articles.

1. Design of an asynchronous processor with bundled-data implementation on a commercial field programmable gate array;furushima;Informatica (Slovenia),2016

2. Burst-mode asynchronous controller implementation on FPGA using relative timing;manoranjan;SPL,2014

3. General approach to asynchronous circuits simulation using synchronous fpgas;dashkin;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,2021

4. Automated Mapping of Asynchronous Circuits on FPGA under Timing Constraints

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Design of Event-Driven Tsetlin Machines Using Safe Petri Nets;Lecture Notes in Computer Science;2024

2. Deployment of Artificial Intelligence Models on Edge Devices: A Tutorial Brief;IEEE Transactions on Circuits and Systems II: Express Briefs;2023

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