Connection Resource Testing Technology on FPGA Based on SOC core
Author:
Funder
Fundamental Research Funds for the Central Universities
National Key R&D Program of China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9679477/9679471/09679613.pdf?arnumber=9679613
Reference15 articles.
1. A Method for Run-Time Prediction of On-Chip Thermal Conditions in Dynamically Reconfigurable SOPCs
2. On‐Chip Generating FPGA Test Configuration Bitstreams to Reduce Manufacturing Test Time
3. Built-in Self-Test Design for Fault Detection and Fault Diagnosis in SRAM-Based FPGA[J];hsu;IEEE Transaction on Instrumentation and Measurement,2009
4. Design of Interconnection Networks for Programmable Logic
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