Guard Cache: Creating Noisy Side-Channels-Reference-Cited by-同舟云学术

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Guard Cache: Creating Noisy Side-Channels

Published:2023-07 Issue:2 Volume:22 Page:97-100
ISSN:1556-6056
Container-title:IEEE Computer Architecture Letters
language:
Short-container-title:IEEE Comput. Arch. Lett.

Author:

Mosquera Fernando¹^ORCID,Kavi Krishna¹^ORCID,Mehta Gayatri²^ORCID,John Lizy³^ORCID

Affiliation:

1. Department of Computer Science and Engineering, University of North Texas, Denton, TX, USA

2. Department of Electrical Engineering, University of North Texas, Denton, TX, USA

3. Department of Electrical and Computer Engineering, University of Texas, Austin, TX, USA

Funder

NSF

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Hardware and Architecture

Link

https://ieeexplore.ieee.org/ielam/10208/10189818/10164208-aam.pdf

Reference20 articles.

1. DAWG: A Defense Against Cache Timing Attacks in Speculative Execution Processors

2. Flush+Flush: A Fast and Stealthy Cache Attack

3. Newcache: Secure Cache Architecture Thwarting Cache Side-Channel Attacks

4. Deconstructing new cache designs for thwarting software cache-based side channel attacks

5. Clepsydracache–preventing cache attacks with time-based evictions;thoma,2021

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