A 150mA Low Noise, High PSRR Low-Dropout Linear Regulator in 0.13μm Technology for RF SoC Applications
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Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/4099684/4099685/04099821.pdf?arnumber=4099821
Cited by 12 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Design of LDO circuit with low noise and high PSRR;Fourth International Conference on Mechanical, Electronics, and Electrical and Automation Control (METMS 2024);2024-06-05
2. Analysis and Design of Low Noise Voltage Regulator With Integrated Single BJT Bandgap Reference Upto 10 mA Loads;IEEE Transactions on Circuits and Systems II: Express Briefs;2024-06
3. A low power LDO with high PSR over a wide frequency range based on an impedance attenuation buffer;IEICE Electronics Express;2024-03-25
4. Analysis on the Method of Enhanced Transient State of DLDO;Journal of Circuits, Systems and Computers;2022-01-21
5. Less occupied and ultra-low noise LDO design;Analog Integrated Circuits and Signal Processing;2014-09-07
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