Author:
Benacer Imad,Boyer Francois-Raymond,Savaria Yvon
Cited by
6 articles.
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1. Research and Design of Arbitration Mechanism for Multi-Core Data Manager;Journal of Sensor Technology and Application;2022
2. A High-Speed, Scalable, and Programmable Traffic Manager Architecture for Flow-Based Networking;IEEE Access;2019
3. A Fast, Single-Instruction–Multiple-Data, Scalable Priority Queue;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2018-10
4. A Novel Priority-Allocated Scheme for Flow-Based Queue Managers;2018 IEEE 20th International Conference on High Performance Computing and Communications; IEEE 16th International Conference on Smart City; IEEE 4th International Conference on Data Science and Systems (HPCC/SmartCity/DSS);2018-06
5. Design of a Low Latency 40 Gb/s Flow-Based Traffic Manager Using High-Level Synthesis;2018 IEEE International Symposium on Circuits and Systems (ISCAS);2018-05