A size sensitivity method for interactive MOS circuit sizing
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/6324002/6328940/06328983.pdf?arnumber=6328983
Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Optimum Operating Points of Transistors with minimal Aging-Aware Sensitivity;Proceedings of the 28th Symposium on Integrated Circuits and Systems Design;2015-08-31
2. A size sensitivity method for interactive CMOS circuit sizing;Analog Integrated Circuits and Signal Processing;2013-09-19
3. Graph-Pair Decision Diagram Construction for Topological Symbolic Circuit Analysis;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2013-02
4. Graph-Based Symbolic and Symbolic Sensitivity Analysis of Analog Integrated Circuits;Analog/RF and Mixed-Signal Circuit Systematic Design;2013
5. XPS investigation of the composition of the external surface of concrete after demoulding, cleaning and carbonation;Surface and Interface Analysis;2012-09-28
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