Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Computational Theory and Mathematics,Hardware and Architecture,Theoretical Computer Science,Software
Cited by
26 articles.
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1. Multiplier Design Addressing Area-Delay Trade-offs by using DSP and Logic resources on FPGAs;2024 IEEE 35th International Conference on Application-specific Systems, Architectures and Processors (ASAP);2024-07-24
2. Small Logic-based Multipliers with Incomplete Sub-Multipliers for FPGAs;2024 IEEE 31st Symposium on Computer Arithmetic (ARITH);2024-06-10
3. GOMARL: Global Optimization of Multiplier using Multi-Agent Reinforcement Learning;2024 2nd International Symposium of Electronics Design Automation (ISEDA);2024-05-10
4. High-efficiency Compressor Trees for Latest AMD FPGAs;ACM Transactions on Reconfigurable Technology and Systems;2024-04-30
5. Multiplier Optimization via E-Graph Rewriting;2023 57th Asilomar Conference on Signals, Systems, and Computers;2023-10-29