DTCO Launches Moore’s Law Over the Feature Scaling Wall-Reference-Cited by-同舟云学术

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DTCO Launches Moore’s Law Over the Feature Scaling Wall

Published:2020-12-12 Issue: Volume: Page:
ISSN:
Container-title:2020 IEEE International Electron Devices Meeting (IEDM)
language:
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Author:

Moroz V.,Lin X.-W.,Asenov P.,Sherlekar D.,Choi M.,Sponton L.,Melvin L. S.,Lee J.,Cheng B.,Nannipieri A.,Huang J.,Jones S.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9371868/9371888/09372010.pdf?arnumber=9372010

Cited by 12 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Investigation of die-cost scaling scenarios in future technologies;DTCO and Computational Patterning III;2024-04-10

2. An Efficient and Accurate DTCO Simulation Framework for Reliability and Variability-Aware Explorations of FinFETs, Nanosheets, and Beyond;2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM);2024-03-03

3. Neural Compact Modeling Framework for Flexible Model Parameter Selection with High Accuracy and Fast SPICE Simulation;Advanced Intelligent Systems;2024-01-06

4. New structure transistors for advanced technology node CMOS ICs;National Science Review;2024-01-05

5. Materials to System Co-optimization (MSCO^™) for SRAM and its application towards Gate-All-Around Technology;2023 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD);2023-09-27

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