Cryo-CMOS Interfaces for Large-Scale Quantum Computers

Author:

Sebastiano F.,van Dijk J.P.G.,Hart P.A. lt,Patra B.,van Staveren J.,Xue X.,Almudever C.G.,Scappucci G.,Veldhorst M.,Vandersypen L.M.K.,Vladimirescu A.,Pellerano S.,Babaie M.,Charbon E.

Publisher

IEEE

Cited by 15 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A 3.5K 4-6 GHz RF-DAC for Cryogenic Quantum Applications in 28-nm Bulk CMOS;IEEE Transactions on Circuits and Systems II: Express Briefs;2024-09

2. Leveraging off-the-shelf silicon chips for quantum computing;Applied Physics Letters;2024-06-24

3. A 46.7-dB Gain 9.3-K Noise Temperature 5.8-mW Two-Fold Current Reuse Dual Noise-Canceling LNA in 28-nm CMOS for Qubit Readout;2024 IEEE Radio Frequency Integrated Circuits Symposium (RFIC);2024-06-16

4. A $G_{m}$-Boosting Inductorless Noise-Canceling Low Noise Amplifier in 40-nm CMOS for Quantum Applications;2024 IEEE/MTT-S International Microwave Symposium - IMS 2024;2024-06-16

5. A 0.01-to-2.6-GHz Two-Fold Current Reuse Dual Noise-Canceling LNA Achieving 6.8-K Noise Temperature for Quantum Applications;IEEE Transactions on Circuits and Systems II: Express Briefs;2024-05

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