Multiprocessor architectures for embedded system-on-chip applications-Reference-Cited by-同舟云学术

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Multiprocessor architectures for embedded system-on-chip applications

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Container-title:17th International Conference on VLSI Design. Proceedings.
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Author:

Ravikumar C.P.

Publisher

IEEE Comput. Soc

Link

http://xplorestaging.ieee.org/ielx5/8911/28180/01260972.pdf?arnumber=1260972

Cited by 12 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Gate Oxide and Implantation Process Co-Optimization for Low-Power MCU Applications;IEEE Journal of the Electron Devices Society;2021

2. A technique of data streams speculation for heterogeneous MC-DSPs;2009 IEEE 8th International Conference on ASIC;2009-10

3. Hardware-based synchronization framework for heterogeneous RISC/Coprocessor architectures;2009 International Symposium on Systems, Architectures, Modeling, and Simulation;2009-07

4. A 300 MHz Embedded Flash Memory with Pipeline Architecture and Offset-Free Sense Amplifiers for Dual-Core Automotive Microcontrollers;IEICE Transactions on Electronics;2009

5. Scalability Analysis to Optimize a Network on Chip;2009 International Conference on Advanced Information Networking and Applications;2009

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