Synthesis of full-adder circuit using reversible logic

Author:

Babu H.M.H.,Islam M.R.,Chowdhury S.M.A.,Chowdhury A.R.

Publisher

IEEE Comput. Soc

Cited by 32 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A New Exact Reversible Full Adder for High Speed Arithmetic Applications;2024 3rd International Conference for Innovation in Technology (INOCON);2024-03-01

2. Fault-Tolerant Reversible-Logic Based RO-PUF for Secure Device Authentication;IEEE Transactions on Circuits and Systems I: Regular Papers;2024

3. Design and simulation of reversible one-bit full adders using QCA technology;Optical and Quantum Electronics;2023-09-09

4. Design and Analysis of Quantum Binary Adder-Subtractor Using IBM Qiskit;2023 1st International Conference on Circuits, Power and Intelligent Systems (CCPIS);2023-09-01

5. Reversible Gates: A Paradigm Shift in Computing;IEEE Open Journal of Circuits and Systems;2023

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