System-on-chip security architecture and CAD framework for hardware patch

Author:

Deb Nath Atul Prasad,Ray Sandip,Basak Abhishek,Bhunia Swarup

Publisher

IEEE

Cited by 19 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Investigating the Feasibility of eFPGA-based Hardware Patching;2024 IEEE 30th International Symposium on On-Line Testing and Robust System Design (IOLTS);2024-07-03

2. DiSPEL: A Framework for SoC Security Policy Synthesis and Distributed Enforcement;2024 IEEE International Symposium on Hardware Oriented Security and Trust (HOST);2024-05-06

3. Theoretical Patchability Quantification for IP-Level Hardware Patching Designs;2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC);2024-01-22

4. Trusted Computing Architectures for IoT Devices;Lecture Notes in Computer Science;2024

5. Runtime SoC Security Validation;Hardware Security;2024

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