Hardware architecture for high throughput event visual data filtering with matrix of IIR filters algorithm-Reference-Cited by-同舟云学术

Hardware architecture for high throughput event visual data filtering with matrix of IIR filters algorithm

Published:2022-08 Issue: Volume: Page:
ISSN:
Container-title:2022 25th Euromicro Conference on Digital System Design (DSD)
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Author:

Kowalczyk Marcin¹,Kryjak Tomasz¹

Affiliation:

1. AGH University of Science and Technology,Department of Automatic Control and Robotics,Krakow,Poland

Funder

National Science Centre

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9996588/9996595/09996596.pdf?arnumber=9996596

Reference9 articles.

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2. Dongyuel: Near-chip Dynamic Vision Filtering for Low-Bandwidth Pedestrian Detection;anthony;2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI),0

3. DBA-Filter: A Dynamic Background Activity Noise Filtering Algorithm for Event Cameras;mohamed;Intelligent Computing,2022

4. Evaluating noise filtering for event-based asynchronous change detection image sensors;daniel;2016 6th IEEE International Conference on Biomedical Robotics and Biomechatronics (BioRob),0

5. A USB3. 0 FPGA event-based filtering and tracking framework for dynamic vision sensors;alejandro;2015 IEEE International Symposium on Circuits and Systems (ISCAS),0

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1. Interpolation-Based Event Visual Data Filtering Algorithms;2023 IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops (CVPRW);2023-06

2. Within-Camera Multilayer Perceptron DVS Denoising;2023 IEEE/CVF Conference on Computer Vision and Pattern Recognition Workshops (CVPRW);2023-06