An $8.73\mathrm{G}\Omega$ Input Impedance VCO-Based Neural Front-End with Autonomous Time-Domain Impedance Boosting Technique and Maximum 0.215s Re-Calibration Time
Author:
Affiliation:
1. Shanghai Jiao Tong University,Department of Micro-Nano Electronics,Shanghai,China
Funder
National Key Research and Development Program of China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10347557/10347908/10347941.pdf?arnumber=10347941
Reference8 articles.
1. An Analog Front-End Chip With Self-Calibrated Input Impedance for Monitoring of Biosignals via Dry Electrode-Skin Interfaces
2. An Ultra-High Input Impedance Analog Front End Using Self-Calibrated Positive Feedback
3. A $3.8-\mu\text{uW}/\text{Ch},\ 15-\mathrm{G}\Omega$ Total Input Impedance Chopper Stabilized Amplifier with Dual Positive Feedback Loops and Auto-calibration Scheme;Park,2021
4. A $136\mathrm{G}\Omega$-Input-Impedance Active Electrode for Non-Contact ECG Using Auto-Calibrated Positive Feedback and Capacitance Scaling in Femtofarad Resolution
5. Analysis and Design of VCO-Based Neural Front-End With Mixed Domain Level-Crossing for Fast Artifact Recovery
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