Static mapping by dual recursive bipartitioning of process architecture graphs

Author:

Pellegrini F.

Publisher

IEEE Comput. Soc. Press

Cited by 33 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. CMLB: a Communication-aware and Memory Load Balance Mapping Optimization for Modern NUMA Systems;2021 IEEE 23rd Int Conf on High Performance Computing & Communications; 7th Int Conf on Data Science & Systems; 19th Int Conf on Smart City; 7th Int Conf on Dependability in Sensor, Cloud & Big Data Systems & Application (HPCC/DSS/SmartCity/DependSys);2021-12

2. A Deep Reinforcement Learning Method for Solving Task Mapping Problems with Dynamic Traffic on Parallel Systems;The International Conference on High Performance Computing in Asia-Pacific Region;2021-01-20

3. An MPI-based Algorithm for Mapping Complex Networks onto Hierarchical Architectures;Euro-Par 2021: Parallel Processing;2021

4. Characterizing the Sharing Behavior of Applications Using Software Transactional Memory;Benchmarking, Measuring, and Optimizing;2021

5. Online Thread and Data Mapping Using a Sharing-Aware Memory Management Unit;ACM Transactions on Modeling and Performance Evaluation of Computing Systems;2020-12-31

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