JFET circuit simulation using SPICE implemented with an improved model
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software
Link
http://xplorestaging.ieee.org/ielx1/43/6776/00273745.pdf?arnumber=273745
Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Analytical model for the double-gate JFET applied to SiC power JFETs;International Journal of Modelling and Simulation;2020-08-23
2. Compact Si JFET model for cryogenic temperature;Cryogenics;2020-06
3. Charge-Based Modeling of Long-Channel Symmetric Double-Gate Junction FETs—Part I: Drain Current and Transconductances;IEEE Transactions on Electron Devices;2018-07
4. Charge-based Model for Junction FETs;IEEE Transactions on Electron Devices;2018-07
5. Extraction of scalable electrical model for a SOI JFET using BSIM3 model;Microelectronics Journal;2013-01
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