Affiliation:
1. Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education), School of Microelectronics, Xidian University, Xi’an, China
Funder
National Key Research and Development Program of China
National Natural Science Foundation of China
Zhejiang Provincial Natural Science Foundation of China
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Reference14 articles.
1. An 8b 1.0-to-1.25 GS/s 0.7-to-0.8V single-stage time-based gated-ring-oscillator ADC with 2? interpolating sense-amplifier-latches;yonar;IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers,2023
2. 3.1 A 3.2GS/s 10 ENOB 61mW Ringamp ADC in 16nm with Background Monitoring of Distortion
3. A 7b 4.5 GS/s 4? interleaved SAR ADC with fully on-chip background timing skew calibration;wang;IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers,2023
4. A 12-Bit 1 GS/s RF Sampling Pipeline-SAR ADC With Harmonic Injecting Cross-Coupled Pair Achieving 7.5 fj/Conv-Step
5. A 10-bit 100-MS/s Reference-Free SAR ADC in 90 nm CMOS