SoCCom: Automated Synthesis of System-on-Chip Architectures
Author:
Affiliation:
1. Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USA
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Link
http://xplorestaging.ieee.org/ielx7/92/9739817/09714864.pdf?arnumber=9714864
Reference29 articles.
1. GPUWattch
2. Architectural Simulators Considered Harmful
3. A load balancing inspired optimization framework for exascale multicore systems: A complex networks approach
4. Plasticity-on-Chip Design: Exploiting Self-Similarity for Data Communications
5. Analyzing CUDA workloads using a detailed GPU simulator
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1. SeVNoC: Security Validation of System-on-Chip Designs With NoC Fabrics;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-02
2. Design and Evaluation of Performance-efficient SoC-on-FPGA for Cloud-based Healthcare Applications;2022 IEEE Nordic Circuits and Systems Conference (NorCAS);2022-10-25
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