Via-Minimization-Oriented Region Routing Under Length-Matching Constraints in Rapid Single-Flux-Quantum Circuits
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Link
http://xplorestaging.ieee.org/ielx7/92/9445837/09366738.pdf?arnumber=9366738
Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Automatic Cell Placement for Josephson Transmission Lines in a Cell-Based Layout Design Environment for RSFQ Circuits;Journal of Physics: Conference Series;2024-06-01
2. JRouter: A Multi-Terminal Hierarchical Length-Matching Router under Planar Manhattan Routing Model for RSFQ Circuits;Proceedings of the Great Lakes Symposium on VLSI 2023;2023-06-05
3. Fixed-Order Placement of Pipelined Architecture in Rapid Single-Flux-Quantum Circuits;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2022-10
4. A survey on superconducting computing technology: circuits, architectures and design tools;CCF Transactions on High Performance Computing;2022-03
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