VLSI Design of a High-Performance Multicontext MQ Arithmetic Coder
Author:
Affiliation:
1. School of Microelectronics, Tianjin University, Tianjin, China
2. Chinese Aeronautical Radio Electronics Research Institute, Shanghai, China
3. College of Electronic Information and Optical Engineering, Nankai University, Tianjin, China
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Link
http://xplorestaging.ieee.org/ielx7/92/10049803/10012280.pdf?arnumber=10012280
Reference9 articles.
1. Concurrency techniques for arithmetic coding in JPEG2000
2. Two-Symbol FPGA Architecture for Fast Arithmetic Encoding in JPEG 2000
3. High-throughput MQ encoder for pass-parallel EBCOT in JPEG2000
4. A High-Throughput VLSI Architecture Design of Arithmetic Encoder in JPEG2000
5. An Efficient Pass-Parallel Architecture for Embedded Block Coder in JPEG 2000
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