Write Buffer-Oriented Energy Reduction in the L1 Data Cache for Embedded Systems

Author:

Lee Jongmin,Kim Soontae

Funder

ICT Research and Development Program through the Ministry of Science, ICT and Future Planning/Institute for Information and Communications Technology Promotion

National Research Foundation through the Korean Government

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Double-Shift: A Low-Power DNN Weights Storage and Access Framework based on Approximate Decomposition and Quantization;ACM Transactions on Design Automation of Electronic Systems;2022-03-31

2. Write energy reduction of STT-MRAM based multi-core cache hierarchies;International Journal of Electronics Letters;2018-06-12

3. TLB Index-Based Tagging for Reducing Data Cache and TLB Energy Consumption;IEEE Transactions on Computers;2017-07-01

4. A Survey on Performance of On-Chip Cache for Multi-core Architectures;Proceedings of the International Conference on Informatics and Analytics;2016-08-25

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