Reducing Cost of Yield Enhancement in 3-D Stacked Memories Via Asymmetric Layer Repair Capability
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Published:2014-09
Issue:9
Volume:22
Page:2017-2024
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ISSN:1063-8210
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Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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language:
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Short-container-title:IEEE Trans. VLSI Syst.
Author:
Rab Muhammad Tauseef,Bawa Asad Amin,Touba Nur A.
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software