A Novel Cache-Utilization-Based Dynamic Voltage-Frequency Scaling Mechanism for Reliability Enhancements
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Link
http://xplorestaging.ieee.org/ielx7/92/7862316/07725503.pdf?arnumber=7725503
Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Energy efficiency in multicore shared cache by fault tolerance using a genetic algorithm based block reuse predictor;Microprocessors and Microsystems;2023-09
2. TS Cache: A Fast Cache With Timing-Speculation Mechanism Under Low Supply Voltages;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2020-01
3. Power Reduction and BTI Mitigation of Data-Cache Memory Based on the Storage Management of Narrow-Width Values;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2019-07
4. Low-power optimisation of a pixel array architecture for next generation High Energy Physics detectors;2017 13th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME);2017-06
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