COPMA: Compact and Optimized Polynomial Multiplier Accelerator for High-Performance Implementation of LWR-Based PQC-Reference-Cited by-同舟云学术

COPMA: Compact and Optimized Polynomial Multiplier Accelerator for High-Performance Implementation of LWR-Based PQC

Published:2023-04 Issue:4 Volume:31 Page:596-600
ISSN:1063-8210
Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
language:
Short-container-title:IEEE Trans. VLSI Syst.

Author:

He Pengzhou¹^ORCID,Tu Yazheng¹^ORCID,Bao Tianyou¹,Sousa Leonel²^ORCID,Xie Jiafeng¹^ORCID

Affiliation:

1. Department of Electrical and Computer Engineering, Villanova University, Villanova, PA, USA

2. Electrical and Computer Engineering Department (DEEC), Instituto Superior Técnico (IST), Universidade de Lisboa, Lisbon, Portugal

Funder

NIST

NSF

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

https://ieeexplore.ieee.org/ielam/92/10079225/10048766-aam.pdf

Reference20 articles.

1. Lightweight Hardware Implementation of Binary Ring-LWE PQC Accelerator

2. A Lightweight and Efficient Schoolbook Polynomial Multiplier for Saber

3. Low-latency VLSI architectures for modular polynomial multiplication via fast filtering and applications to lattice-based cryptography;tan;arXiv 2110 12127,2021

4. Implementing and Benchmarking Three Lattice-Based Post-Quantum Cryptography Algorithms Using Software/Hardware Codesign

5. NIST post-quantum cryptography—A hardware evaluation study;basu;Cryptology-eprint-archive,2019

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