Ultralow-Latency Successive Cancellation Polar Decoding Architecture Using Tree-Level Parallelism-Reference-Cited by-同舟云学术

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Ultralow-Latency Successive Cancellation Polar Decoding Architecture Using Tree-Level Parallelism

Published:2021-06 Issue:6 Volume:29 Page:1083-1094
ISSN:1063-8210
Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
language:
Short-container-title:IEEE Trans. VLSI Syst.

Author:

Kam Dongyun^ORCID,Yoo Hoyoung^ORCID,Lee Youngjoo^ORCID

Funder

National Research Foundation

Ministry of Science and ICT (MSIT), Korean Government

MSIT through the Grand Information Technology Research Center support program supervised by the Institute for Information & Communication Technology Promotion

Samsung Electronics Company Ltd

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

http://xplorestaging.ieee.org/ielx7/92/9445837/09399104.pdf?arnumber=9399104

Cited by 4 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Low-Latency SCL Polar Decoder Architecture Using Overlapped Pruning Operations;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-03

2. Towards More Secure PUF Applications: A Low-Area Polar Decoder Implementation;2022 IEEE 35th International System-on-Chip Conference (SOCC);2022-09-05

3. A Survey on FEC Techniques for Industrial Wireless Communications;IEEE Open Journal of the Industrial Electronics Society;2022

4. Low-Complexity and Low-Latency SVC Decoding Architecture Using Modified MAP-SP Algorithm;IEEE Transactions on Circuits and Systems I: Regular Papers;2022

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