A Security-Enhanced, Charge-Pump-Free, ISO14443-A-/ISO10373-6-Compliant RFID Tag With 16.2-μW Embedded RRAM and Reconfigurable Strong PUF

Author:

Ren Qirui1ORCID,Huo Qiang1ORCID,Chen Zhisheng1,Gao Qi1,Wang Yiming2ORCID,Yang Yiming2,Wu Hao1,Fu Xiangqu1ORCID,Xu Xiaoxin1ORCID,Luo Qing1ORCID,Gao Jianfeng1,Chen Chengying3,Zhao Xiaojin4ORCID,Lei Dengyun5ORCID,Wang Xinghua2ORCID,Zhang Feng1ORCID,Chen Yong6ORCID,Mak Pui-In6ORCID

Affiliation:

1. Key Laboratory of Microelectronics Device and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China

2. School of Information and Electronics, Beijing Institute of Technology, Beijing, China

3. School of Microelectronics, Xiamen University of Technology, Xiamen, China

4. College of Electronics and Information Engineering, Shenzhen University, Shenzhen, China

5. School of Integrated Circuits, Guangdong University of Technology, Guangzhou, China

6. State Key Laboratory of Analog and Mixed-Signal VLSI and the Faculty of Science and Technology–Department of ECE, University of Macau, Macao, China

Funder

National Key Research Plan of China

Strategic Priority Research Program of the Chinese Academy of Sciences China

National Natural Science Foundation of China

Science and Technology Development Fund, Macau

Science and Technology Development Fund

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Reference26 articles.

1. A 130nm 1Mb HfOx embedded RRAM macro using self-adaptive peripheral circuit system techniques for 1.6X work temperature range

2. 8.7 physically unclonable function for secure key generation with a key error rate of 2E-38 in 45 nm smart-card chips;karpinskyy;IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers,2016

3. Physical Unclonable Functions and Applications: A Tutorial

4. 25.2 A reconfigurable RRAM physically unclonable function utilizing post-process randomness source with <6×10?6 native bit error rate;pang;IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers,2019

5. 19.4 Embedded 1 Mb ReRAM in 28 nm CMOS with 0.27-to-1 V read using swing-sample-and-couple sense amplifier and self-boost-write-termination scheme;chang;IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers,2014

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