A Low-Power In-Memory Multiplication and Accumulation Array With Modified Radix-4 Input and Canonical Signed Digit Weights-Reference-Cited by-同舟云学术

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A Low-Power In-Memory Multiplication and Accumulation Array With Modified Radix-4 Input and Canonical Signed Digit Weights

Published:2023-11 Issue:11 Volume:31 Page:1700-1712
ISSN:1063-8210
Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
language:
Short-container-title:IEEE Trans. VLSI Syst.

Author:

Xiao Rui¹^ORCID,Zhang Yewei¹,Wang Bo²^ORCID,Xu Yanfeng³,Fan Jicong³,Shen Haibin¹^ORCID,Huang Kejie¹^ORCID

Affiliation:

1. College of Information Science and Electronic Engineering, Zhejiang University, Hangzhou, China

2. Department of Information System Technology and Design, Singapore University of Technology and Design, Tampines, Singapore

3. China Electronics Technology Group Corporation, Wuxi, China

Funder

National Natural Science Foundation of China

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

http://xplorestaging.ieee.org/ielx7/92/10287007/10239224.pdf?arnumber=10239224

Reference35 articles.

1. ReRAM-Based Processing-in-Memory Architecture for Recurrent Neural Network Acceleration

2. Resistive-RAM-Based In-Memory Computing for Neural Network: A Review

3. Memristive crossbar arrays for brain-inspired computing

4. Memristors Enabled Computing Correlation Parameter In-Memory System: A Potential Alternative to Von Neumann Architecture

5. Neuromorphic Computing with Memristor Crossbar

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