An Energy-Efficient L2 Cache Architecture Using Way Tag Information Under Write-Through Policy-Reference-Cited by-同舟云学术

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An Energy-Efficient L2 Cache Architecture Using Way Tag Information Under Write-Through Policy

Published:2013-01 Issue:1 Volume:21 Page:102-112
ISSN:1063-8210
Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
language:
Short-container-title:IEEE Trans. VLSI Syst.

Author:

Dai Jianwei,Wang Lei

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

http://xplorestaging.ieee.org/ielx5/92/6387661/06140944.pdf?arnumber=6140944

Cited by 11 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Abusing Cache Line Dirty States to Leak Information in Commercial Processors;2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2022-04

2. Energy-Efficient Shared Cache Using Way Prediction Based on Way Access Dominance Detection;IEEE Access;2021

3. CLEAR: Cache Lines Error Accumulation Reduction by exploiting invisible accesses;Microelectronics Journal;2019-08

4. TLB Index-Based Tagging for Reducing Data Cache and TLB Energy Consumption;IEEE Transactions on Computers;2017-07-01

5. Architectural Techniques for Improving the Power Consumption of NoC-Based CMPs: A Case Study of Cache and Network Layer;Journal of Low Power Electronics and Applications;2017-05-29

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