ULV-Turbo Cache for an Instantaneous Performance Boost on Asymmetric Architectures
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Published:2017-12
Issue:12
Volume:25
Page:3341-3354
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ISSN:1063-8210
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Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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language:
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Short-container-title:IEEE Trans. VLSI Syst.
Author:
Wang Po-HaoORCID,
Chien Yung-Chen,
Tsai Shang-Jen,
Lin Xuan-Yu,
Tanjung Rizal,
Lin Yi-Sian,
Syu Shu-Wei,
Lin Tay-Jyi,
Wang Jinn-Shyan,
Chen Tien-Fu
Funder
Industrial Technology Research Institute
Ministry of Science and Technology
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Cited by
1 articles.
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