Author:
Rajanna Viveka Konandur,Amrutur Bharadwaj
Funder
Department of Electronics and Information Technology, MCIT, Government of India
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Cited by
4 articles.
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1. Robust 12T Sram Cell Using 45nm Technology;International Journal of Scientific Research in Science, Engineering and Technology;2020-05-05
2. A Design of Highly Stable and Low-Power SRAM Cell;Advances in Intelligent Systems and Computing;2018-08-23
3. Theoretical Model of EnDP to Achieve Energy-Efficient SRAM;IEEE Transactions on Circuits and Systems I: Regular Papers;2017-08
4. A Pipeline Replica Bitline Technique for Suppressing Timing Variation of SRAM Sense Amplifiers in a 28-nm CMOS Process;IEEE Journal of Solid-State Circuits;2017-03