Vina-FPGA: A Hardware-Accelerated Molecular Docking Tool With Fixed-Point Quantization and Low-Level Parallelism-Reference-Cited by-同舟云学术

Vina-FPGA: A Hardware-Accelerated Molecular Docking Tool With Fixed-Point Quantization and Low-Level Parallelism

Published:2023-04 Issue:4 Volume:31 Page:484-497
ISSN:1063-8210
Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
language:
Short-container-title:IEEE Trans. VLSI Syst.

Author:

Ling Ming¹^ORCID,Lin Qingde¹^ORCID,Chen Ruiqi²,Qi Haimeng¹,Lin Mengru³,Zhu Yanxiang³,Wu Jiansheng⁴

Affiliation:

1. National ASIC System Engineering Technology Research Center, Southeast University, Nanjing, China

2. Zhangjiang Fudan International Innovation Center, Fudan University, Shanghai, China

3. VeriMake Innovation Laboratory, Nanjing Renmian Integrated Circuit Company Ltd., Nanjing, China

4. School of Geographic and Biological Information, Nanjing University of Posts and Telecommunications, Nanjing, China

Funder

National Natural Science Foundation of China

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

Reference34 articles.

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