TVLA*: Test Vector Leakage Assessment on Hardware Implementations of Asymmetric Cryptography Algorithms-Reference-Cited by-同舟云学术

TVLA*: Test Vector Leakage Assessment on Hardware Implementations of Asymmetric Cryptography Algorithms

Published:2023-09 Issue:9 Volume:31 Page:1269-1279
ISSN:1063-8210
Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
language:
Short-container-title:IEEE Trans. VLSI Syst.

Author:

Jayasena Aruna¹^ORCID,Andrews Emma¹^ORCID,Mishra Prabhat¹^ORCID

Affiliation:

1. Department of Computer and Information Science and Engineering, University of Florida, Gainesville, FL, USA

Funder

National Science Foundation

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

Reference26 articles.

4. Recovering OpenSSL ECDSA nonces using the FLUSH+ RELOAD cache side-channel attack;yarom;Cryptology-eprint-archive,2014

5. A practical implementation of the timing attack;dhem;Proc Int Conf Smart Card Res Adv Appl,1998

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