Supporting Very Large DRAM Caches with Compound-Access Scheduling and MissMap

Author:

Loh G.,Hill M. D.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Cited by 40 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

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2. Enabling Design Space Exploration of DRAM Caches for Emerging Memory Systems;2023 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS);2023-04

3. A Hybrid Memory Architecture Supporting Fine-Grained Data Migration;SSRN Electronic Journal;2022

4. Improving the Performance of Block-based DRAM Caches Via Tag-Data Decoupling;IEEE Transactions on Computers;2021-11-01

5. KLOCs: kernel-level object contexts for heterogeneous memory systems;Proceedings of the 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems;2021-04-17

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