An 8-b Multiplier Using Single-Stage Full Adder Cell in Single-Flux-Quantum Circuit Technology

Author:

Cong HaolinORCID,Li Mingye,Pedram MassoudORCID

Funder

Office of Naval Research

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Performance Comparison of 2 x1 Multiplexer Based High Performance Static and Dynamic Nanoscale Carry Select Adder for Future DSP Applications;2024 IEEE 4th International Conference on VLSI Systems, Architecture, Technology and Applications (VLSI SATA);2024-05-17

2. High-density superconductive logic circuits utilizing 0 and π josephson junctions;Engineering Research Express;2024-02-19

3. Timing Regulation Scheme for RSFQ Circuit;IEEE Transactions on Applied Superconductivity;2023-09

4. Low-Cost Superconducting Fan-Out With Cell $\text{I}_\text{C}$ Ranking;IEEE Transactions on Applied Superconductivity;2023-09

5. A Full-Custom Design Flow and a Top-Down RTL-to-GDS Flow for Adiabatic Quantum-Flux-Parametron Logic Using a Commercial EDA Design Suite;IEEE Transactions on Applied Superconductivity;2023-08

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