A −117dBc THD (−132dBc HD3) and 126dB DR Audio Decoder with Code-Change-Insensitive RT-DEM Algorithm and Circuit Technique for Relaxing Velocity Saturation Effect of Poly Resistors-Reference-Cited by-同舟云学术

A −117dBc THD (−132dBc HD3) and 126dB DR Audio Decoder with Code-Change-Insensitive RT-DEM Algorithm and Circuit Technique for Relaxing Velocity Saturation Effect of Poly Resistors

Published:2022-02-20 Issue: Volume: Page:
ISSN:
Container-title:2022 IEEE International Solid- State Circuits Conference (ISSCC)
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Author:

Wen Shon-Hang¹,Hsiao Chuan-Hung¹,Chien Shih-Hsiung¹,Chen Ya-Chi¹,Chen Kuan-Hung¹,Chen Kuan-Dar¹

Affiliation:

1. MediaTek,Hsinchu,Taiwan

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9731529/9731102/09731634.pdf?arnumber=9731634

Reference7 articles.

1. A 1-mW Class-AB Amplifier With −101 dB THD+N for High-Fidelity 16 $\Omega$ Headphones in 65-nm CMOS

2. Design of Three-Stage Class-AB 160 Headphone Driver Capable of Handling Wide Range of Load Capacitance;dhanasekaran;IEEE JSSC,2009

3. A ?105dBc THD+N (?114dBc HD2) at 2.8VPP Swing and 120dB DR Audio Decoder with Sample-and-Hold Noise Filtering and Poly Resistor Linearization Schemes;wen;ISSCC,2019

4. A 40 nm Fully Integrated 82 mW Stereo Headphone Module for Mobile Applications

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