DC Electrical Trees in Polymer Insulation Inflicted by Rapidly Decreasing Short Circuit Voltage Flanks
Author:
Affiliation:
1. Chalmers University of Technology,Department of Electrical Engineering,Gotheburg,Sweden,41296
2. Chalmers University of Technology,Department of Chemistry and Chemical Engineering,Gotheburg,Sweden,41296
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9863422/9863219/09863220.pdf?arnumber=9863220
Reference12 articles.
1. DC tree and grounded DC tree in XLPE
2. Understanding electrical trees in solids: from experiment to theory
3. Partial Discharge Characteristics of Electrical Treeing in XLPE Insulation Exposed to Voltages of Different Rise Times
4. Detection of Electrical Tree Formation in XLPE Insulation through Applying Disturbed DC Waveforms
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