An FPGA architecture for high speed edge and corner detection-Reference-Cited by-同舟云学术

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An FPGA architecture for high speed edge and corner detection

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Container-title:Proceedings Fifth IEEE International Workshop on Computer Architectures for Machine Perception
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Author:

Torres-Huitzil C.,Arias-Estrada M.

Publisher

IEEE Comput. Soc

Link

http://xplorestaging.ieee.org/ielx5/7032/18939/00875965.pdf?arnumber=875965

Cited by 15 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Feature Extraction Acceleration to Stabilize Execution Time for Real-Time Applications in Low-Cost Embedded Systems;Journal of Circuits, Systems and Computers;2019-08-19

2. An FPGA-based implementation of corner detection and matching with outlier rejection;International Journal of Remote Sensing;2018-08-02

3. A New FPGA Architecture of FAST and BRIEF Algorithm for On-Board Corner Detection and Matching;Sensors;2018-03-28

4. A Review of Image Interest Point Detectors: From Algorithms to FPGA Hardware Implementations;Image Feature Detectors and Descriptors;2016

5. A High-Performance FPGA-Based Image Feature Detector and Matcher Based on the FAST and BRIEF Algorithms;International Journal of Advanced Robotic Systems;2015-10-01

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